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Espressif Systems /ESP32-P4 /ISP /HIST_SEG0

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Interpret as HIST_SEG0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HIST_SEG_3_40HIST_SEG_2_30HIST_SEG_1_20HIST_SEG_0_1

Description

histogram bin control register 0

Fields

HIST_SEG_3_4

this field configures threshold of histogram bin 3 and bin 4
HIST_SEG_2_3

this field configures threshold of histogram bin 2 and bin 3
HIST_SEG_1_2

this field configures threshold of histogram bin 1 and bin 2
HIST_SEG_0_1

this field configures threshold of histogram bin 0 and bin 1

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data